Description
74155 IC Dual 2-to-4 Line
Decoders/Demultiplexer
DIP-16
The 74155 IC Dual 2-to-4 Line Decoders/Demultiplexes DIP-16, designed for digital logic and data routing applications. It contains two independent 2-to-4 decoders that can also function as demultiplexes, providing flexibility in digital circuit design. Each decoder accepts two binary select inputs and provides four mutually exclusive active-low outputs. Built with TTL (Transistor-Transistor Logic) technology, the 74155 offers fast switching, high noise immunity, and reliable performance. It is widely used in address decoding, data distribution, memory selection, and digital control systems in both educational and industrial applications.
Features
Contains two independent 2-to-4 line decoders/demultiplexes.
Active-low outputs for easy interface with TTL and CMOS logic.
Can be used as a decoder or demultiplexer.
High-speed TTL logic performance.
Low power consumption and high noise immunity.
Enable inputs allow flexible control and cascading capability.
Wide operating voltage range (typically 4.75V to 5.25V).
Standard 16-pin dual in-line (DIP) package for easy prototyping.
Compatible with other TTL logic ICs.
Ideal for address decoding, data routing, and logic control applications.
Pinout Configuration
Pin No.
Pin Name
Description
1
1C
Input C (Control Input for Decoder 1)
2
1G̅
Enable Input (Active LOW) for Decoder 1
3
B
Binary Input B (Shared between both decoders)
4
1Y3
Output Y3 of Decoder 1 (Active LOW)
5
1Y2
Output Y2 of Decoder 1 (Active LOW)
6
1Y1
Output Y1 of Decoder 1 (Active LOW)
7
1Y0
Output Y0 of Decoder 1 (Active LOW)
8
GND
Ground (0V)
9
2Y0
Output Y0 of Decoder 2 (Active LOW)
10
2Y1
Output Y1 of Decoder 2 (Active LOW)
11
2Y2
Output Y2 of Decoder 2 (Active LOW)
12
2Y3
Output Y3 of Decoder 2 (Active LOW)
13
A
Binary Input A (Shared between both decoders)
14
2G̅
Enable Input (Active LOW) for Decoder 2
15
2C
Input C (Control Input for Decoder 2)
16
VCC
Supply Voltage (+5V)
Specifications
Parameter
Value / Description
IC Function
Dual 2-Line to 4-Line Decoder / Demultiplexer
Logic Family
TTL (Transistor-Transistor Logic)
Number of Decoders
2 Independent Decoders
Number of Inputs (per Decoder)
2 Data Inputs + 1 Enable Input
Number of Outputs (per Decoder)
4 Active-Low Outputs
Output Type
Active Low
Propagation Delay Time
20 nsec
Operating Voltage (Vcc)
4.75V to 5.25V
Typical Supply Voltage
5V
Input HIGH Voltage (VIH) Min
2.0V
Input LOW Voltage (VIL) Max
0.8V
Output HIGH Voltage (VOH) Min
2.4V
Output LOW Voltage (VOL) Max
0.4V
Power Dissipation
80 mW
Operating Temperature Range
0°C to +70°C
Package Type
DIP-16 (Dual In-line Package)
Mounting Type
Through Hole
Logic Compatibility
TTL and CMOS
Applications
Memory address decoding in microprocessor systems.
Data routing and signal demultiplexing circuits.
Digital logic and control circuit design.
Binary-to-decimal decoding applications.
Input/output selection in digital systems.
Multiprocessor communication and data distribution.
Display decoding and segment selection circuits.
Logic level translation and control signal generation.
Embedded systems and automation projects.
Educational experiments and digital logic training kits.
Package Contents
1 x
74155 IC Dual 2-to-4 Line Decoders/Demultiplexer DIP-16
Datasheet
74155
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