Description
The 74LS193 is a UP/DOWN DIP-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronously with the LOW-to-HIGH transitions on the clock inputs. Separate Terminal Count Up and Terminal Count Down outputs are provided which are used as the clocks for a subsequent stage without extra logic, thus simplifying multistage counter designs. Individual preset inputs allow the circuits to be used as programmable counters. Both the Parallel Load (PL) and the Master Reset (MR) inputs asynchronously override the clocks.
Features:-
Low Power 95 mW Typical Dissipation
High Speed 40 MHz Typical Count Frequency
Synchronous Counting
Asynchronous Master Reset and Parallel Load
Individual Preset Inputs
Cascading Circuitry Internally Provided
Input Clamp Diodes Limit High-Speed Termination Effects
Pin Configuration:
Pin No.
Pin Name
1
P1 ~ B
2
Q1 ~ QB
3
Q0 ~ QA
4
CPD
5
CPU
6
Q2 ~ QC
7
Q3 ~ QD
8
GND
9
P3 ~ D
10
P2 ~ C
11
PL̅(Active Low)
12
TCU̅(Active Low)
13
TCD̅(Active Low)
14
MR
15
P0 ~ A
16
VCC
Pin
Description
CPU
Count up clock pulse input
CPD
Count down clock pulse input
MR
Asynchronous Master Reset(Clear) input
PL̅
Asynchronous Parallel Load(Active Low) Input
TCU
Terminal count Up(Carry) output
TCD
Terminal count Down(Borrow) output
A,B, C, & D
Preset Inputs(Parallel Data Inputs)
Qn
Flip-Flop Outputs
Specifications:-
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
74
4.75
5
5.25
V
TA
Operating Ambient Temperature Range
74
0
25
70
°C
IOH
Output Current — High
74
-0.4
mA
IOL
Output Current — Low
74
8
mA
SN74LS193 Datasheet
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